37 #if defined(__MK20DX256__) // Teensy 3.1
38 #define ADC_TEENSY_3_1
39 #elif defined(__MK20DX128__) // Teensy 3.0
40 #define ADC_TEENSY_3_0
41 #elif defined(__MKL26Z64__) // Teensy LC
46 #if defined(ADC_TEENSY_3_1) // Teensy 3.1
47 #define ADC_NUM_ADCS 2
48 #elif defined(ADC_TEENSY_3_0) // Teensy 3.0
49 #define ADC_NUM_ADCS 1
50 #elif defined(ADC_TEENSY_LC) // Teensy LC
51 #define ADC_NUM_ADCS 1
55 #if defined(ADC_TEENSY_3_1) // Teensy 3.1
57 #elif defined(ADC_TEENSY_3_0) // Teensy 3.0
59 #elif defined(ADC_TEENSY_LC) // Teensy LC
64 #if defined(ADC_TEENSY_3_1) // Teensy 3.1
66 #elif defined(ADC_TEENSY_3_0) // Teensy 3.0
68 #elif defined(ADC_TEENSY_LC) // Teensy LC
73 #if defined(ADC_TEENSY_3_1) // Teensy 3.1
75 #elif defined(ADC_TEENSY_3_0) // Teensy 3.0
77 #elif defined(ADC_TEENSY_LC) // Teensy LC
107 #if F_BUS == 60000000
108 #define ADC_CFG1_3_75MHZ (ADC_CFG1_ADIV(3) + ADC_CFG1_ADICLK(1))
109 #define ADC_CFG1_7_5MHZ (ADC_CFG1_ADIV(2) + ADC_CFG1_ADICLK(1))
110 #define ADC_CFG1_15MHZ (ADC_CFG1_ADIV(1) + ADC_CFG1_ADICLK(1))
112 #define ADC_CFG1_VERY_LOW_SPEED ADC_CFG1_LOW_SPEED
113 #define ADC_CFG1_LOW_SPEED (ADC_CFG1_3_75MHZ)
114 #define ADC_CFG1_MED_SPEED (ADC_CFG1_7_5MHZ)
115 #define ADC_CFG1_HI_SPEED_16_BITS (ADC_CFG1_7_5MHZ)
116 #define ADC_CFG1_HI_SPEED (ADC_CFG1_15MHZ)
117 #define ADC_CFG1_VERY_HIGH_SPEED ADC_CFG1_HI_SPEED
119 #elif F_BUS == 56000000
120 #define ADC_CFG1_3_5MHZ (ADC_CFG1_ADIV(3) + ADC_CFG1_ADICLK(1))
121 #define ADC_CFG1_7MHZ (ADC_CFG1_ADIV(2) + ADC_CFG1_ADICLK(1))
122 #define ADC_CFG1_14MHZ (ADC_CFG1_ADIV(1) + ADC_CFG1_ADICLK(1))
124 #define ADC_CFG1_VERY_LOW_SPEED ADC_CFG1_LOW_SPEED
125 #define ADC_CFG1_LOW_SPEED (ADC_CFG1_3_5MHZ)
126 #define ADC_CFG1_MED_SPEED (ADC_CFG1_7MHZ)
127 #define ADC_CFG1_HI_SPEED_16_BITS (ADC_CFG1_7MHZ)
128 #define ADC_CFG1_HI_SPEED (ADC_CFG1_14MHZ)
129 #define ADC_CFG1_VERY_HIGH_SPEED ADC_CFG1_HI_SPEED
131 #elif F_BUS == 48000000
132 #define ADC_CFG1_3MHZ (ADC_CFG1_ADIV(3) + ADC_CFG1_ADICLK(1)) // Clock divide select: 3=div8 + Input clock: 1=bus/2
133 #define ADC_CFG1_6MHZ (ADC_CFG1_ADIV(2) + ADC_CFG1_ADICLK(1)) // Clock divide select: 2=div4 + Input clock: 1=bus/2
134 #define ADC_CFG1_12MHZ (ADC_CFG1_ADIV(1) + ADC_CFG1_ADICLK(1)) // Clock divide select: 1=div2 Input clock: 1=bus/2
135 #define ADC_CFG1_24MHZ (ADC_CFG1_ADIV(0) + ADC_CFG1_ADICLK(1)) // this is way too fast, so accurancy is not guaranteed
137 #define ADC_CFG1_VERY_LOW_SPEED ADC_CFG1_LOW_SPEED
138 #define ADC_CFG1_LOW_SPEED (ADC_CFG1_3MHZ)
139 #define ADC_CFG1_MED_SPEED (ADC_CFG1_6MHZ)
140 #define ADC_CFG1_HI_SPEED_16_BITS (ADC_CFG1_12MHZ)
141 #define ADC_CFG1_HI_SPEED (ADC_CFG1_12MHZ)
142 #define ADC_CFG1_VERY_HIGH_SPEED (ADC_CFG1_24MHZ)
144 #elif F_BUS == 40000000
145 #define ADC_CFG1_2_5MHZ (ADC_CFG1_ADIV(3) + ADC_CFG1_ADICLK(1))
146 #define ADC_CFG1_5MHZ (ADC_CFG1_ADIV(2) + ADC_CFG1_ADICLK(1))
147 #define ADC_CFG1_10MHZ (ADC_CFG1_ADIV(1) + ADC_CFG1_ADICLK(1))
148 #define ADC_CFG1_20MHZ (ADC_CFG1_ADIV(0) + ADC_CFG1_ADICLK(1)) // this is too fast, so accurancy is not guaranteed
150 #define ADC_CFG1_VERY_LOW_SPEED ADC_CFG1_LOW_SPEED
151 #define ADC_CFG1_LOW_SPEED (ADC_CFG1_2_5MHZ)
152 #define ADC_CFG1_MED_SPEED (ADC_CFG1_5MHZ)
153 #define ADC_CFG1_HI_SPEED_16_BITS (ADC_CFG1_10MHZ)
154 #define ADC_CFG1_HI_SPEED (ADC_CFG1_10MHZ)
155 #define ADC_CFG1_VERY_HIGH_SPEED (ADC_CFG1_20MHZ)
157 #elif F_BUS == 36000000
158 #define ADC_CFG1_2_25MHZ (ADC_CFG1_ADIV(3) + ADC_CFG1_ADICLK(1))
159 #define ADC_CFG1_4_5MHZ (ADC_CFG1_ADIV(2) + ADC_CFG1_ADICLK(1))
160 #define ADC_CFG1_9MHZ (ADC_CFG1_ADIV(1) + ADC_CFG1_ADICLK(1))
161 #define ADC_CFG1_18MHZ (ADC_CFG1_ADIV(0) + ADC_CFG1_ADICLK(1))
163 #define ADC_CFG1_VERY_LOW_SPEED ADC_CFG1_LOW_SPEED
164 #define ADC_CFG1_LOW_SPEED (ADC_CFG1_2_25MHZ)
165 #define ADC_CFG1_MED_SPEED (ADC_CFG1_9MHZ)
166 #define ADC_CFG1_HI_SPEED_16_BITS (ADC_CFG1_9MHZ)
167 #define ADC_CFG1_HI_SPEED (ADC_CFG1_18MHZ)
168 #define ADC_CFG1_VERY_HIGH_SPEED ADC_CFG1_HI_SPEED
170 #elif F_BUS == 24000000
171 #define ADC_CFG1_1_5MHZ (ADC_CFG1_ADIV(3) + ADC_CFG1_ADICLK(1)) // Clock divide select: 3=div8 + Input clock: 1=bus/2
172 #define ADC_CFG1_3MHZ (ADC_CFG1_ADIV(3) + ADC_CFG1_ADICLK(0)) // Clock divide select: 3=div8 + Input clock: 0=bus
173 #define ADC_CFG1_6MHZ (ADC_CFG1_ADIV(2) + ADC_CFG1_ADICLK(0)) // Clock divide select: 2=div4 + Input clock: 0=bus
174 #define ADC_CFG1_12MHZ (ADC_CFG1_ADIV(1) + ADC_CFG1_ADICLK(0)) // Clock divide select: 1=div2 + Input clock: 0=bus
175 #define ADC_CFG1_24MHZ (ADC_CFG1_ADIV(0) + ADC_CFG1_ADICLK(0)) // this is way too fast, so accurancy is not guaranteed
177 #define ADC_CFG1_VERY_LOW_SPEED (ADC_CFG1_1_5MHZ)
178 #define ADC_CFG1_LOW_SPEED (ADC_CFG1_3MHZ)
179 #define ADC_CFG1_MED_SPEED (ADC_CFG1_6MHZ)
180 #define ADC_CFG1_HI_SPEED_16_BITS (ADC_CFG1_12MHZ)
181 #define ADC_CFG1_HI_SPEED (ADC_CFG1_12MHZ)
182 #define ADC_CFG1_VERY_HIGH_SPEED (ADC_CFG1_24MHZ)
184 #elif F_BUS == 4000000
185 #define ADC_CFG1_1MHZ (ADC_CFG1_ADIV(2) + ADC_CFG1_ADICLK(0))
186 #define ADC_CFG1_2MHZ (ADC_CFG1_ADIV(1) + ADC_CFG1_ADICLK(0))
187 #define ADC_CFG1_4MHZ (ADC_CFG1_ADIV(0) + ADC_CFG1_ADICLK(0))
189 #define ADC_CFG1_VERY_LOW_SPEED (ADC_CFG1_1MHZ)
190 #define ADC_CFG1_LOW_SPEED (ADC_CFG1_2MHZ)
191 #define ADC_CFG1_MED_SPEED (ADC_CFG1_4MHZ)
192 #define ADC_CFG1_HI_SPEED_16_BITS (ADC_CFG1_4MHZ)
193 #define ADC_CFG1_HI_SPEED (ADC_CFG1_4MHZ)
194 #define ADC_CFG1_VERY_HIGH_SPEED ADC_CFG1_HI_SPEED
196 #elif F_BUS == 2000000
197 #define ADC_CFG1_1MHZ (ADC_CFG1_ADIV(1) + ADC_CFG1_ADICLK(0))
198 #define ADC_CFG1_2MHZ (ADC_CFG1_ADIV(0) + ADC_CFG1_ADICLK(0))
200 #define ADC_CFG1_VERY_LOW_SPEED (ADC_CFG1_1MHZ)
201 #define ADC_CFG1_LOW_SPEED (ADC_CFG1_2MHZ)
202 #define ADC_CFG1_MED_SPEED (ADC_CFG1_2MHZ)
203 #define ADC_CFG1_HI_SPEED_16_BITS (ADC_CFG1_2MHZ)
204 #define ADC_CFG1_HI_SPEED (ADC_CFG1_2MHZ)
205 #define ADC_CFG1_VERY_HIGH_SPEED ADC_CFG1_HI_SPEED
208 #error "F_BUS must be 60, 56, 48, 40, 36, 24, 4 or 2 MHz"
212 #define ADC_CFG1_ADICLK_MASK_1 (1<<1)
213 #define ADC_CFG1_ADICLK_MASK_0 (1<<0)
215 #define ADC_CFG1_ADIV_MASK_1 (1<<6)
216 #define ADC_CFG1_ADIV_MASK_0 (1<<5)
235 #define ADC_VERY_LOW_SPEED 0
236 #define ADC_LOW_SPEED 1
237 #define ADC_MED_SPEED 2
238 #define ADC_HIGH_SPEED_16BITS 3
239 #define ADC_HIGH_SPEED 4
240 #define ADC_VERY_HIGH_SPEED 5
244 #define ADC_ADACK_2_4 16
245 #define ADC_ADACK_4_0 17
246 #define ADC_ADACK_5_2 18
247 #define ADC_ADACK_6_2 19
252 #define ADC_SC1A_CHANNELS (0x1F)
254 #define ADC_SC1A_PIN_INVALID (0x1F)
256 #define ADC_MAX_PIN (44)
258 #define ADC_SC1A_PIN_MUX (0x80)
260 #define ADC_SC1A_PIN_DIFF (0x40)
262 #define ADC_SC1A_PIN_PGA (0x80)
266 #define ADC_REF_DEFAULT 0
267 #define ADC_REF_ALT 1
268 #if defined(ADC_TEENSY_3_0) || defined(ADC_TEENSY_3_1)
272 #define ADC_REF_3V3 ADC_REF_DEFAULT
273 #define ADC_REF_1V2 ADC_REF_ALT
274 #define ADC_REF_EXT ADC_REF_DEFAULT
276 #elif defined(ADC_TEENSY_LC)
279 #define ADC_REF_3V3 ADC_REF_ALT
280 #define ADC_REF_EXT ADC_REF_DEFAULT
285 #define ADC_ERROR_DIFF_VALUE (-70000)
286 #define ADC_ERROR_VALUE ADC_ERROR_DIFF_VALUE
291 #define ADC_ERROR_ALL 0x3FF
292 #define ADC_ERROR_CLEAR 0x0
293 #define ADC_ERROR_OTHER (1<<0)
294 #define ADC_ERROR_CALIB (1<<1)
295 #define ADC_ERROR_WRONG_PIN (1<<2)
296 #define ADC_ERROR_ANALOG_READ (1<<3)
297 #define ADC_ERROR_COMPARISON (1<<4)
298 #define ADC_ERROR_ANALOG_DIFF_READ (1<<5)
299 #define ADC_ERROR_CONT (1<<6)
300 #define ADC_ERROR_CONT_DIFF (1<<7)
301 #define ADC_ERROR_WRONG_ADC (0<<8)
302 #define ADC_ERROR_SYNCH (1<<9)
308 #define ADC_TEMP_SENSOR 38 // 0.719 V at 25ºC and slope of 1.715 mV/ºC for Teensy 3.x and 0.716 V, 1.62 mV/ºC for Teensy LC
309 #define ADC_VREF_OUT 39
310 #define ADC_BANDGAP 41
320 #define ADC_SC1A_COCO_BIT (7)
321 #define ADC_SC1A_AIEN_BIT (6)
322 #define ADC_SC1_DIFF_BIT (5)
324 #define ADC_CFG1_ADLPC_BIT (7)
325 #define ADC_CFG1_ADIV1_BIT (6)
326 #define ADC_CFG1_ADIV0_BIT (5)
327 #define ADC_CFG1_ADLSMP_BIT (4)
328 #define ADC_CFG1_MODE1_BIT (3)
329 #define ADC_CFG1_MODE0_BIT (2)
330 #define ADC_CFG1_ADICLK1_BIT (1)
331 #define ADC_CFG1_ADICLK0_BIT (0)
333 #define ADC_CFG2_MUXSEL_BIT (4)
334 #define ADC_CFG2_ADACKEN_BIT (3)
335 #define ADC_CFG2_ADHSC_BIT (2)
336 #define ADC_CFG2_ADLSTS1_BIT (1)
337 #define ADC_CFG2_ADLSTS0_BIT (0)
339 #define ADC_SC2_ADACT_BIT (7)
340 #define ADC_SC2_ADTRG_BIT (6)
341 #define ADC_SC2_ACFE_BIT (5)
342 #define ADC_SC2_ACFGT_BIT (4)
343 #define ADC_SC2_ACREN_BIT (3)
344 #define ADC_SC2_DMAEN_BIT (2)
345 #define ADC_SC2_REFSEL0_BIT (0)
347 #define ADC_SC3_CAL_BIT (7)
348 #define ADC_SC3_CALF_BIT (6)
349 #define ADC_SC3_ADCO_BIT (3)
350 #define ADC_SC3_AVGE_BIT (2)
351 #define ADC_SC3_AVGS1_BIT (1)
352 #define ADC_SC3_AVGS0_BIT (0)
354 #define ADC_PGA_PGAEN_BIT (23)
368 ADC_Module(uint8_t ADC_number,
const uint8_t*
const a_channel2sc1a,
const uint8_t*
const a_channel2sc1a_diff);
492 void enableCompareRange(int16_t lowerLimit, int16_t upperLimit,
bool insideRange,
bool inclusive);
517 setBit(ADC_SC3, ADC_SC3_ADCO_BIT);
521 clearBit(ADC_SC3, ADC_SC3_ADCO_BIT);
526 clearBit(ADC_SC2, ADC_SC2_ADTRG_BIT);
531 setBit(ADC_SC2, ADC_SC2_ADTRG_BIT);
540 return getBit(ADC_SC2, ADC_SC2_ADACT_BIT);
552 return getBit(ADC_SC1A, ADC_SC1A_COCO_BIT);
559 return getBit(ADC_SC1A, ADC_SC1_DIFF_BIT);
565 return getBit(ADC_SC3, ADC_SC3_ADCO_BIT);
571 return getBit(ADC_PGA, ADC_PGA_PGAEN_BIT);
671 return (int16_t)(int32_t)*ADC_RA;
683 #define PDB_CONFIG (PDB_SC_TRGSEL(15) | PDB_SC_PDBEN | PDB_SC_PDBIE \
684 | PDB_SC_CONT | PDB_SC_LDMOD(0))
687 #define PDB_CHnC1_TOS_1 0x0100
688 #define PDB_CHnC1_EN_1 0x01
709 uint32_t savedSC1A, savedSC2, savedSC3, savedCFG1, savedCFG2;
717 config->savedSC1A = *ADC_SC1A;
718 config->savedCFG1 = *ADC_CFG1;
719 config->savedCFG2 = *ADC_CFG2;
720 config->savedSC2 = *ADC_SC2;
721 config->savedSC3 = *ADC_SC3;
726 *ADC_CFG1 = config->savedCFG1;
727 *ADC_CFG2 = config->savedCFG2;
728 *ADC_SC2 = config->savedSC2;
729 *ADC_SC3 = config->savedSC3;
730 *ADC_SC1A = config->savedSC1A;
751 volatile uint8_t calibrating;
758 uint8_t analog_res_bits;
761 uint32_t analog_max_val;
764 uint8_t analog_num_average;
767 uint8_t analog_reference_internal;
770 uint8_t var_enableInterrupts;
776 uint8_t conversion_speed;
779 uint8_t sampling_speed;
782 const uint8_t*
const channel2sc1a;
785 const uint8_t*
const channel2sc1a_diff;
794 void startInternalReference();
797 void stopInternalReference();
805 #if defined(ADC_TEENSY_3_1) || defined(ADC_TEENSY_3_0)
807 #define ADC_BITBAND_ADDR(reg, bit) (((uint32_t)(reg) - 0x40000000) * 32 + (bit) * 4 + 0x42000000)
809 __attribute__((always_inline)) void setBit(volatile uint32_t* reg, uint8_t bit) {
810 (*(uint32_t *)ADC_BITBAND_ADDR((reg), (bit))) = 1;
812 __attribute__((always_inline)) void clearBit(volatile uint32_t* reg, uint8_t bit) {
813 (*(uint32_t *)ADC_BITBAND_ADDR((reg), (bit))) = 0;
816 __attribute__((always_inline)) void changeBit(volatile uint32_t* reg, uint8_t bit,
bool state) {
817 (*(uint32_t *)ADC_BITBAND_ADDR((reg), (bit))) = state;
820 __attribute__((always_inline)) volatile
bool getBit(volatile uint32_t* reg, uint8_t bit) {
821 return (
volatile bool)*(uint32_t*)(ADC_BITBAND_ADDR(reg, bit));
824 #elif defined(ADC_TEENSY_LC)
829 __attribute__((always_inline)) void setBit(volatile uint32_t* reg, uint8_t bit) {
831 *(
volatile uint32_t*)((uint32_t)(reg) | (1<<27)) = 1<<bit;
833 __attribute__((always_inline)) void clearBit(volatile uint32_t* reg, uint8_t bit) {
835 *(
volatile uint32_t*)((uint32_t)(reg) | (1<<26)) = ~(1<<bit);
838 __attribute__((always_inline)) void changeBit(volatile uint32_t* reg, uint8_t bit,
bool state) {
841 *(
volatile uint32_t*)((uint32_t)(reg) | (1<<27)) = 1<<bit;
843 *(
volatile uint32_t*)((uint32_t)(reg) | (1<<26)) = ~(1<<bit);
848 __attribute__((always_inline)) volatile
bool getBit(volatile uint32_t* reg, uint8_t bit) {
849 return (
volatile bool)*(uint32_t *)((uint32_t)(reg) | (1<<28) | (bit<<23) );
857 typedef volatile uint32_t*
const reg;
907 #endif // ADC_MODULE_H
void enableCompareRange(int16_t lowerLimit, int16_t upperLimit, bool insideRange, bool inclusive)
Enable the compare function to a range.
Definition: ADC_Module.cpp:730
void setSamplingSpeed(uint8_t speed)
Sets the sampling speed.
Definition: ADC_Module.cpp:560
void disableCompare()
Disable the compare function.
Definition: ADC_Module.cpp:769
bool isConverting() __attribute__((always_inline))
Is the ADC converting at the moment?
Definition: ADC_Module.h:538
void recalibrate()
Starts the calibration sequence, waits until it's done and writes the results.
Definition: ADC_Module.cpp:289
bool isDifferential() __attribute__((always_inline))
Is the ADC in differential mode?
Definition: ADC_Module.h:557
bool checkDifferentialPins(uint8_t pinP, uint8_t pinN)
Check whether the pins are a valid analog differential pair of pins.
Definition: ADC_Module.cpp:845
void stopContinuous()
Stops continuous conversion.
Definition: ADC_Module.cpp:1241
uint8_t num_measurements
Number of measurements that the ADC is performing.
Definition: ADC_Module.h:735
void calibrate()
Starts the calibration sequence.
Definition: ADC_Module.cpp:223
void disablePGA()
Disable PGA.
Definition: ADC_Module.cpp:815
uint32_t getMaxValue()
Returns the maximum value for a measurement: 2^res-1.
Definition: ADC_Module.cpp:420
Definition: ADC_Module.h:359
int analogReadDifferential(uint8_t pinP, uint8_t pinN)
Reads the differential analog value of two pins (pinP - pinN).
Definition: ADC_Module.cpp:1013
uint8_t ADC_num
Which adc is this?
Definition: ADC_Module.h:745
int readSingle() __attribute__((always_inline))
Reads the analog value of a single conversion.
Definition: ADC_Module.h:644
bool isComplete() __attribute__((always_inline))
Is an ADC conversion ready?
Definition: ADC_Module.h:550
void enableDMA()
Enable DMA request.
Definition: ADC_Module.cpp:689
void enableCompare(int16_t compValue, bool greaterThan)
Enable the compare function to a single value.
Definition: ADC_Module.cpp:712
void continuousMode() __attribute__((always_inline))
Set continuous conversion mode.
Definition: ADC_Module.h:516
int analogReadContinuous() __attribute__((always_inline))
Reads the analog value of a continuous conversion.
Definition: ADC_Module.h:670
bool startSingleDifferential(uint8_t pinP, uint8_t pinN)
Start a differential conversion between two pins (pinP - pinN) and enables interrupts.
Definition: ADC_Module.cpp:1132
bool isPGAEnabled() __attribute__((always_inline))
Is the PGA function enabled?
Definition: ADC_Module.h:570
void setConversionSpeed(uint8_t speed)
Sets the conversion speed.
Definition: ADC_Module.cpp:437
void setHardwareTrigger() __attribute__((always_inline))
Use hardware to trigger the ADC.
Definition: ADC_Module.h:530
bool startContinuousDifferential(uint8_t pinP, uint8_t pinN)
Starts continuous conversion between the pins (pinP-pinN).
Definition: ADC_Module.cpp:1205
void startDifferentialFast(uint8_t pinP, uint8_t pinN)
Starts a differential conversion on the pair of pins.
Definition: ADC_Module.cpp:905
volatile uint16_t fail_flag
This flag indicates that some kind of error took place.
Definition: ADC_Module.h:741
Store the config of the adc.
Definition: ADC_Module.h:708
void startPDB(uint32_t freq)
Start PDB triggering the ADC at the frequency.
Definition: ADC_Module.cpp:1261
void saveConfig(ADC_Config *config)
Save config of the ADC to the ADC_Config struct.
Definition: ADC_Module.h:716
uint8_t getPGA()
Returns the PGA level.
Definition: ADC_Module.cpp:810
void setResolution(uint8_t bits)
Change the resolution of the measurement.
Definition: ADC_Module.cpp:358
bool checkPin(uint8_t pin)
Check whether the pin is a valid analog pin.
Definition: ADC_Module.cpp:827
void singleMode() __attribute__((always_inline))
Set single-shot conversion mode.
Definition: ADC_Module.h:520
bool startContinuous(uint8_t pin)
Starts continuous conversion on the pin.
Definition: ADC_Module.cpp:1178
ADC_Module(uint8_t ADC_number, const uint8_t *const a_channel2sc1a, const uint8_t *const a_channel2sc1a_diff)
Constructor.
Definition: ADC_Module.cpp:42
void disableDMA()
Disable ADC DMA request.
Definition: ADC_Module.cpp:700
int analogRead(uint8_t pin)
Returns the analog value of the pin.
Definition: ADC_Module.cpp:946
bool startSingleRead(uint8_t pin)
Starts an analog measurement on the pin and enables interrupts.
Definition: ADC_Module.cpp:1097
uint8_t adcWasInUse
Was the adc in use before a call?
Definition: ADC_Module.h:713
void wait_for_cal()
Waits until calibration is finished and writes the corresponding registers.
Definition: ADC_Module.cpp:242
uint8_t getResolution()
Returns the resolution of the ADC_Module.
Definition: ADC_Module.cpp:413
void setSoftwareTrigger() __attribute__((always_inline))
Use software to trigger the ADC, this is the most common setting.
Definition: ADC_Module.h:525
void setReference(uint8_t type)
Set the voltage reference you prefer, default is vcc.
Definition: ADC_Module.cpp:305
void setAveraging(uint8_t num)
Set the number of averages.
Definition: ADC_Module.cpp:617
bool isContinuous() __attribute__((always_inline))
Is the ADC in continuous mode?
Definition: ADC_Module.h:563
void enableInterrupts()
Enable interrupts.
Definition: ADC_Module.cpp:661
void stopPDB()
Stop the PDB.
Definition: ADC_Module.cpp:1361
void disableInterrupts()
Disable interrupts.
Definition: ADC_Module.cpp:675
void enablePGA(uint8_t gain)
Enable and set PGA.
Definition: ADC_Module.cpp:780
void startReadFast(uint8_t pin)
Starts a single-ended conversion on the pin.
Definition: ADC_Module.cpp:884
void loadConfig(ADC_Config *config)
Load config to the ADC.
Definition: ADC_Module.h:725